In the fabricating process for semiconductor devices such as LSIs, after circuits are formed on a wafer, electrical testing is conducted to check whether or not the circuits perform predetermined operations.
In this test, for example, to check whether or not circuits operate in the guaranteed temperature range of the product, the wafer is mounted on a heated or cooled stage, and a probe of a testing apparatus is brought into contact with integrated semiconductor chips formed on the wafer.
To conduct the test normally, it is necessary that the probe is brought precisely into contact with electrode pads of the semiconductor chips.
However, when the stage is heated or cooled as described above, the radiant heat from the stage may deform the probe and cause a tip of the probe to miss the electrode pad. In that case, the tip of the probe comes into contact with a passivation film around the electrode pad, and a probe mark is left on the passivation film. In the worst case, a crack may be generated in the passivation film, and bring about a problem such as leakage between power supplies in the semiconductor device.
Particularly, as for a semiconductor device such as a system LSI whose external connection terminals have significantly reduced size and pitch, the probe displacement as described above is likely to occur, and thus the improvement is demanded.
As a method of preventing such probe displacement, for example, there is a method in which a probe is observed from under the probe card with a camera every time a test on a predetermined number of chips is completed. In this case, the position of the probe tip is identified by the observation with the camera, and a stage is moved in a direction such that the displacement can be offset.
However, this method requires the stage to be temporarily withdrawn from the prober to identify the probe with the camera. This requires extra time for the withdrawal. Moreover, this causes another problem such that the probe is naturally cooled and in turn deformed while the stage is withdrawn from the prober, and the deformation hinders precise identification of the position of the probe tip.
Furthermore, with this method, it cannot be checked during the test whether or not a probe mark has been left on a passivation film by the displacement between the probe and the electrode pad. For this reason, the probe mark is finally found in the visual inspection process after the test. In the case that the position of the stage is not precisely corrected in such a situation, a series of multiple chips suffer defect caused by the probe mark. In the worst scenario, all the chips on a single wafer may be defected.
There is also another method in which a stage is temporarily withdrawn from a probe card to allow positioning between a probe and an electrode pad, and a probe mark on the electrode pad made by the contact between the electrode pad and the probe is identified.
Nevertheless, since this method also involves the withdrawing of the stage, the deformation of the probe due to natural cooling and a longer testing period for the withdrawal are inevitable. Further, this method merely judges whether a probe mark is left on the electrode pad or the probe misses the electrode pad. The method cannot go beyond the mere positioning such that the probe has only to contact the electrode pad anywhere, and thus it is difficult to perform highly accurate positioning between the electrode pad and the probe.
Meanwhile, there is still another method as follows. Specifically, the position of a probe mark left on an electrode pad is identified with a camera. If it is found out that the probe mark protrudes outside the electrode pad, an alarm is turned on to stop the measurement, or to urge re-positioning between the probe and the electrode pad.
However, in this method, when the probe mark is to be identified with the camera, a stage has to be conveyed to a position where there is the camera. Thereby, extra time for the conveyance is required, and the probe is naturally cooled and in turn deformed during the conveyance. Hence, the aforementioned problems cannot be solved yet.
Note that the related techniques are disclosed in Japanese Laid-open Patent Publications No. 60-24030, No. 59-5641, No. 07-13990, No. 07-147304, and No. 2008-108930.